Thinking small
It’s a few days old, but I just saw this Engadget post pointing me to a nanotechnology-related Wired article. The article highlights some recent work of Professor Michael Kozicki, demonstrating a new method for storing data using nanoscale copper wires.
Today’s technology takes about 10,000 square nanometers to store a bit of data on a chip (a nanometer is 1 billionth of a meter). We can currently build computer chips using wires that are about 70 nanometers wide, but newer nanoscale technology may allow for wires only 5 to 10 nanometers wide. Similarly, it may be able to store a bit of data using less than 100 square nanometers. This would allow us to store terabytes of data on those nifty little usb drives we all have.
Sometimes when a new nanoscale data storage technology is demonstrated, the folks involved (or their company/university) decide to hype it up and put out a press release. With luck, this results in an actual article being written, which in turn results in a post on Engadget or Slashdot or something. When this happens, both the article and the post tend to contain an optimistic claim about when the described may come to market.
Since this is one of the few areas in which I have actual credentials, I’m usually tempted to leave a slightly technical comment pointing out the difficulties that still lie ahead. Since I have this blog, a big ol’ post seemed more appropriate (and hopefully more reusable).
The storage technology demonstrated by Professor Kozicki sounds promising, but this is far from the first time nanoscale storage has been demonstrated (for example, there’s this, or this, or this). When you hear about this type of thing, it’s important to remember that there’s more to building a memory than simply having a medium for storing data. You need a way to control that medium.
Typically when researchers demonstrated a new type of nanoscale storage, they place their device between two electrodes, then use the electrodes to read and write information (this generally involves applying various voltages across the device). Even though the electrodes are small (about 100 nanometers wide), but they are still quite large compared to the device itself.
Even if the device works perfectly, you cannot make a nanoscale memory by simply placing billions of devices between billions of non-nanoscale electrodes. If you do this, it will still take about 10,000 square nanometers to store each bit. For much denser storage, additional nanoscale technology is required.
One promising approach being pursued is to create a grid of nanoscale wires, then position storage devices between each pair of perpendicular wires. As luck would have it, grids of tightly packed nanowires have been produced, and even used to store data. Unfortunately, no one has yet demonstrated a way of efficiently controlling the individual nanowires that make up the grid. Until we have a way to control tightly packed nanowires, we cannot take advantage of nanoscale storage devices.
For the record, I am optimistic that a fully functional nanoscale memory will be produced before 2010, but I think it is very unlikely that any such device will come to market before then.